1. Field of the Invention
The application relates to an interface circuit that exchanges signals with a memory, and the like.
2. Description of Related Art
In recent years, DRAM (Dynamic Random Access Memory) has been used as a semiconductor storage device having large storage capacities. A double data rate system is adopted as a high-speed data transfer method in order to respond to an increasing operation speed of a system. Such a semiconductor storage device is called DDR-SDRAM (Double Data Rate Synchronous Dynamic Random Access Memory) or DDR2-SDRAM. The DDR-SDRAM adopts a double rate system. In the double rate system, the DDR-SDRAM outputs data DQ in synchronization with a rise and fall of a clock signal and also outputs a data strobe signal DQS. A memory interface circuit provided in a host apparatus (such as a CPU and memory controller) receiving the data DQ receives the data strobe signal DQS to adjust timing for capturing the data DQ. The memory interface circuit is required to decrease malfunctions.
In the double data rate system, two pieces of data are input/output in one cycle (one period of a clock signal). Thus, a pulse width of data to be input/output becomes shorter than that of data of the SDRAM. Moreover, the wiring length between the DDR-SDRAM (hereinafter simply called the memory) and the host apparatus, such as a CPU, is different from system to system. Thus, a difference of the time (flight time) required for data to reach the host apparatus (interface circuit) arises, and the difference makes it difficult for the interface circuit to determine timing for capturing data. For this reason, the memory outputs a data strobe signal to notify the interface circuit of the timing to send out data. Based on the data strobe signal, the interface circuit can reliably capture data.